ESP

The ESP Project page, platform for FPGA and ASIC SoC accelerator design, was significantly updated since the last time we mentioned it

Now it includes many more materials, guides and videos:

📡 How to design accelerator in Vivado HLS and Mentor Graphics Catapult HLS

🔬 Describes HLS4ML Flow. Original HLS4ML papers covered only the core design path, but this guide help you to integrate the core into the computer system

📺 Integrating with Nvidia GPUs sthrough NVDLA

📒 List of the related papers

ESP is run by the System-Level Design (SLD) group at Columbia University, led by Professor Luca P. Carloni.

PDP-11🚀

PDP-11🚀

ESP SoC design platform https://telegra.ph/ESP-01-12

ESP

The ESP Project page, platform for FPGA and ASIC SoC accelerator design, was significantly updated since the last time we mentioned it

Now it includes many more materials, guides and videos:

📡 How to design accelerator in Vivado HLS and Mentor Graphics Catapult HLS

🔬 Describes HLS4ML Flow. Original HLS4ML papers covered only the core design path, but this guide help you to integrate the core into the computer system

📺 Integrating with Nvidia GPUs sthrough NVDLA

📒 List of the related papers

ESP is run by the System-Level Design (SLD) group at Columbia University, led by Professor Luca P. Carloni.

ESP - open SoC platform

Documentation

The ESP website.

hottg.com/pdp11ml/302

765 viewsedited  Oct 8, 2020 at 18:11